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HW Emulation

's ZeBu-Server is an extremely high capacity system emulator with the easy setup and debugging associated with emulation, and the price/performance of rapid prototyping. Supporting multiple users, interfaces, and host computers, ZeBu-Server is a flexible, scalable emulator, with a capacity up to 1 Billion ASIC gates. Providing high bandwidth and multi-MHz performance at any level, ZeBu-Server primarily aims at large-scale, multi-core chip and system emulation applications. It is ideal for the system-integration phase of the design cycle where multiple logic blocks, multiple chips, and embedded software all must be verified together.

Zebu-Server’s key features are:
  • Emulation Speed: Up to 30 MHz design clock (400MHz System Clock)
  • Design Capacity: Scalable to 1 Billion ASIC gates; Up to 100GB DDR2 Design Memory
  • Multiple Users: Up to 25 users
  • High Bandwidth Test Environment: PCI-Express connectivity to multiple host PCs provides high bandwidth for Streaming Transactors, Software Checkers, Assertion Output, and Waveform Generation
  • Rapid setup: Completely automated compiler, starting from ASIC RTL, requiring no RTL modifications
  • zFAST: ZeBu Fast Synthesis for high speed, parallel, incremental synthesis with memory inference and preservation of RTL names
  • Memory Compiler: Supports an unlimited number of ports, scriptable for easy ASIC library conversion
  • Comprehensive Debugging: Run-time access to all register & signals without recompilation; Pre-compiled probes for high speed tracing and software-based checkers; Synthesizable SystemVerilog Assertion support
  • Integrated with popular Third-Party Verification and System Level Tools: Co-simulation with commercial HDL simulators and ESL tools, integration with waveform viewers and interactive debuggers

 
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